Computer systems continue to be designed to meet the two often opposing goals of increased speed and decreased power consumption. The struggle to meet both goals becomes quite evident in the case of electronic devices such as portable computer systems, including notebook and handheld computers. As ever more uses for such electronic devices are found, there is a need for ever more processing capability, including faster processors, more memory, etc. However, at the same time, as ever more uses for such devices are found, there is an increasing desire to make them ever more portable so that such devices become easier to transport to places where they can be used in such new found ways.
This struggle has resulted in efforts to find ways to decrease the amount of power required by each of the components of such electronic devices, including memory devices. Known approaches include creating reduced power modes (commonly referred to as “sleep modes” or “hibernation modes”) for such electronic devices to enter into when not actively being used. DRAM (dynamic random access memory) devices have been created with lower power modes, including what is commonly referred to in the DRAM device industry as “self refresh” mode. In self refresh mode, interactions between DRAM devices and other components are minimized, including interactions where commands are regularly transmitted to DRAM devices to perform the function of refreshing memory cells within a DRAM device to prevent loss of data stored within those memory cells. Self refresh modes entail using a minimal amount of logic built into a DRAM device to allow the DRAM device to autonomously carry out the function of refreshing the DRAM device's memory cells.
However, such approaches to reducing DRAM device power consumption have not addressed the problem of the unnecessary wasting of power to refresh large quantities of memory cells not containing data to be preserved, even in reduced power modes such as self refresh mode.